Cyrix CPUs - Revision history

Michael Dale: /* 5x86 (M1sc) */

2015-10-22T08:01:39Z

‎5x86 (M1sc)

Michael Dale: /* 486DX, DX2, DX4 */

2015-10-22T08:00:57Z

‎486DX, DX2, DX4

Anonymous Coward: /* 486DX, DX2, DX4 = */

2014-05-22T04:51:10Z

‎486DX, DX2, DX4 =

Anonymous Coward: /* 486SLC/DLC */

2014-05-22T04:51:01Z

‎486SLC/DLC

Anonymous Coward at 04:29, 21 May 2014

2014-05-21T04:29:23Z

Anonymous Coward: /* 486S */

2014-05-21T02:56:56Z

‎486S

Anonymous Coward: /* 486SLC/DLC */

2014-05-21T02:54:08Z

‎486SLC/DLC

Anonymous Coward at 07:53, 10 May 2014

2014-05-10T07:53:10Z

Tetrium at 16:40, 24 January 2014

2014-01-24T16:40:00Z

Tetrium at 16:32, 24 January 2014

2014-01-24T16:32:31Z

@@ Line 17: / Line 17: @@
 == 5x86 (M1sc)==
 A scaled back version of the original 6x86 core that was compatible with the 486DX bus. These chips are 64-bit internally and 32-bit externally. They have 16kb of L1 cache that can be configured as either write-through or write-back by changing CPU registers. Cyrix branded chips were mostly 3.6V and rated at 80, 100, 120 and 133MHz. However, the 133MHz version is extremely rare as it was only produced in small quantities for Evergreen CPU upgrade modules. Most chips could be set to use 2X or 3X multipliers, but some of them support 3X or 4X. Sometimes it is marked on the CPU surface or heatsink and sometimes not. IBM and SGS Thompson also sold versions of the 5x86. IBM 5x86C is normally rated more conservatively to run at 3.3V, and only produced in 75 and 100MHz parts. Cyrix 5x86 CPUs provide excellent performance when their extra enhancements are enabled, and generally work well in older 486 motherboards as long as a VRM is used.
 == 6x86 ==

@@ Line 12: / Line 12: @@
 == 486DX, DX2, DX4 ==
 These are all true 486s with the full 8kb of internal cache. Many of them featured writeback L1, and were available in 3.3V, 4V and 5V versions for desktop use. These chips do not use any Intel microcode. They were about 5-10% slower than real Intel 486s.
 == 5x86 (M1sc)==

@@ Line 10: / Line 10: @@
 A version of the 486DLC modified to use a real i486 bus. The main difference was they had 2kb of internal writeback cache (versus 1kb in the DLC and 8kb in a real i486). These chips did not include math coprocessors, but were available in a "dingus" that sat between the CPU and socket. 486S also ran at 4V, versus the standard 5V of Intel and AMD chips of the time. Performance was better than the DLC but slightly slower than a true i486SX.
-== 486DX, DX2, DX4 ===
+== 486DX, DX2, DX4 ==
 These are all true 486s with the full 8kb of internal cache. Many of them featured writeback L1, and were available in 3.3V, 4V and 5V versions for desktop use. These chips do not use any Intel microcode. They were about 5-10% slower than real Intel 486s.
 == 5x86 (M1sc)==

@@ Line 5: / Line 5: @@
 == 486SLC/DLC ==
-Cyrix's first CPU is a hybrid design of 386 and 486 386 bus compatible with 1kb internal cache and support for i486 instructions. The 486xLC is an original design that does not use any Intel microcode. Performance was about 85% of a 486SX. Although originally intended for OEM use only, they often find their way into the hands of end-users as upgrades for older 386 systems. However, upgrades are not always successful as older motherboards often do not support hidden refresh or the extra control lines needed to maintain cache coherency. Therefore, it is usually recommended a 486xLC only be installed in motherboards with specific BIOS/chipset support. However, motherboards can often be modified by those with good skills. 486xLC chips were later sold as special upgrade editions (DRx2, DRu2) which either provided the extra circuitry integrated into the CPU core or by an included "dingus" that sat between the CPU and socket. 486xLC chips were sometimes sold under the labels of other manufacturers (such as TI), but they are all internally identical. TI eventually fell out of favour with Cyrix and produced unauthorized 8kb versions known as "Ti486SXL" and Ti486SXLC".
+Cyrix's first CPU is a hybrid design of 386 and 486. It was 386 bus compatible with 1kb internal cache and support for i486 instructions. The 486xLC is an original design that does not use any Intel microcode. Performance was about 85% of a 486SX. Although originally intended for OEM use only, they often find their way into the hands of end-users as upgrades for older 386 systems. However, upgrades are not always successful as older motherboards often do not support hidden refresh or the extra control lines needed to maintain cache coherency. Therefore, it is usually recommended a 486xLC only be installed in motherboards with specific BIOS/chipset support. However, motherboards can often be modified by those with good skills. 486xLC chips were later sold as special upgrade editions (DRx2, DRu2) which either provided the extra circuitry integrated into the CPU core or by an included "dingus" that sat between the CPU and socket. 486xLC chips were sometimes sold under the labels of other manufacturers (such as TI), but they are all internally identical. TI eventually fell out of favour with Cyrix and produced unauthorized 8kb versions known as "Ti486SXL" and Ti486SXLC".
 == 486S ==

@@ Line 5: / Line 5: @@
 == 486SLC/DLC ==
-Hybrid design of 386 and 486. 386 bus compatible with 1kb internal cache and support for i486 instructions. The 486xLC is an original design that does not use any Intel microcode. Although originally intended for OEM use only, they often find their way into the hands of end-users as upgrades for older 386 systems. However, upgrades are not always successful as older motherboards often do not support hidden refresh or the extra control lines needed to maintain cache coherency. Therefore, it is usually recommended a 486xLC only be installed in motherboards with specific BIOS/chipset support. However, motherboards can often be modified by those with good skills. 486xLC chips were later sold as special upgrade editions (DRx2, DRu2) which either provided the extra circuitry integrated into the CPU core or by an included "dingus" that sat between the CPU and socket. 486xLC chips were sometimes sold under the labels of other manufacturers (such as TI), but they are all internally identical. TI eventually fell out of favour with Cyrix and produced unauthorized 8kb versions known as "Ti486SXL" and Ti486SXLC".
+Cyrix's first CPU is a hybrid design of 386 and 486 386 bus compatible with 1kb internal cache and support for i486 instructions. The 486xLC is an original design that does not use any Intel microcode. Performance was about 85% of a 486SX. Although originally intended for OEM use only, they often find their way into the hands of end-users as upgrades for older 386 systems. However, upgrades are not always successful as older motherboards often do not support hidden refresh or the extra control lines needed to maintain cache coherency. Therefore, it is usually recommended a 486xLC only be installed in motherboards with specific BIOS/chipset support. However, motherboards can often be modified by those with good skills. 486xLC chips were later sold as special upgrade editions (DRx2, DRu2) which either provided the extra circuitry integrated into the CPU core or by an included "dingus" that sat between the CPU and socket. 486xLC chips were sometimes sold under the labels of other manufacturers (such as TI), but they are all internally identical. TI eventually fell out of favour with Cyrix and produced unauthorized 8kb versions known as "Ti486SXL" and Ti486SXLC".
 == 486S ==
@@ Line 11: / Line 11: @@
 == 486DX, DX2, DX4 ===
 == 5x86 (M1sc)==
-A scaled back version of the original 6x86 core that was compatible with the 486DX bus.
+A scaled back version of the original 6x86 core that was compatible with the 486DX bus. These chips are 64-bit internally and 32-bit externally. They have 16kb of L1 cache that can be configured as either write-through or write-back by changing CPU registers. Cyrix branded chips were mostly 3.6V and rated at 80, 100, 120 and 133MHz. However, the 133MHz version is extremely rare as it was only produced in small quantities for Evergreen CPU upgrade modules. Most chips could be set to use 2X or 3X multipliers, but some of them support 3X or 4X. Sometimes it is marked on the CPU surface or heatsink and sometimes not. IBM and SGS Thompson also sold versions of the 5x86. IBM 5x86C is normally rated more conservatively to run at 3.3V, and only produced in 75 and 100MHz parts. Cyrix 5x86 CPUs provide excellent performance when their extra enhancements are enabled, and generally work well in older 486 motherboards as long as a VRM is used.
 == 6x86 ==
-Cyrix's first Socket 7 CPU. This CPU is rather slow (particularly for playing games) and produces a lot of heat.
+Cyrix's first Socket 7 CPU. This CPU produces a lot of heat. This was the first CPU to be marked with PR ratings (Pentium Equivalency). 6x86 was initially marketed as a relatively high end offering and generally scored higher than Intel Pentium chips in integer math.  However, they were defeated quite easily in floating point operations (the FPU used in the 6x86 was relatively unchanged from the cores used in the original Fasmath chips). 3D games like Quake were starting to become popular around the time the 6x86 hit the market, and had much more demanding FPU requirements. Therefore, the 6x86 was relegated to low-end segment of the market. 6x86 had 16kb L1 cache and was available in speeds of 80MHz (P90+), 90MHz (P100+), 100MHz (P120+), 110MHz (P133+), 120MHz (P150+), 133MHz (P166+) and 150MHz (P200+). The 150MHz model proved to be troublesome because of the 75MHz FSB and excessive heat.
 == 6x86L ==
-Cyrix's attempt to fix the heat issues, though it was only moderately succesfull at doing so
+Cyrix's attempt to fix the heat issues (L = Low Power), though it was only moderately succesful at doing so. Unlike the original 6x86 these use a split-rail voltage design like the Pentium MMX. These also have 16kb L1 cache.
 == 6x86MX/MII ==
-This is basically a 6x86L with MMX instructions and a larger cache.
+This is basically a 6x86L with MMX instructions and a larger 64kb cache.
 Later renamed to '''Cyrix MII''', this was also Cyrix's last processor line for Socket 7.
 As these CPU's were clocked (slightly) higher, the heat problems re-emerged. The heat problems were only fixed when a 2.2v version of the MII was released.

@@ Line 1: / Line 1: @@
-== MII ==
+=== Cyrix ===
 [[File:IBM_6x86MX_PR333.jpg|200px|thumb||IBM/Cyrix MII PR333]]
 [[File:Cyrix_6x86MX.JPG|200px|thumb||Cyrix 6x86MX PR233]]